Predictive wafer scheduling for multi-chamber semiconductor equipment
US12154804B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 25, 2023 |
| Grant date | Nov 26, 2024 |
| Priority date | — |
| Expiry date | Oct 25, 2043 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P90/30
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A method includes identifying a set of wafers, wherein each wafer is associated with a respective start time of a set of start times, determining whether the set of wafers includes an idle wafer, in response to determining that the set of wafers includes an idle wafer that is idle for a duration that exceeds a predefined threshold value, generating a modified set of start times by modifying at least the start time for the idle wafer, and initiating a computer simulation forecasting processing of the set of wafers using a wafer modification chamber and a wafer movement chamber based on the modified set of start times. The computer simulation uses a machine learning model trained based on a first duration to perform a first manufacturing task using the wafer modification chamber and a second duration to perform a second manufacturing task using the wafer movement chamber.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.