Semiconductor package with non-uniformly distributed vias
US12159829B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 29, 2022 |
| Grant date | Dec 3, 2024 |
| Priority date | — |
| Expiry date | Nov 28, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/30101
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In an embodiment, a semiconductor package includes a semiconductor device embedded in an insulating layer and having a first contact pad at a first surface of the semiconductor device. An outer contact pad is positioned on a lower surface of the insulating layer. A vertical redistribution structure electrically couples the first contact pad to the outer contact pad. The first contact pad has a plurality of first via sites. A first subset of the first via sites is occupied by first vias and a second subset of the first via sites remains unoccupied and forms a first via-free zone, such that the first vias are non-uniformly distributed over the first contact pad.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.