Method of manufacturing capacitor structure
US12159917B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 13, 2021 |
| Grant date | Dec 3, 2024 |
| Priority date | — |
| Expiry date | Oct 12, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D88/00
Abstract
A method of manufacturing a capacitor structure is provided, including the following steps. A substrate is provided. A first doped silicon material layer is formed on the substrate. A surface flattening process is performed on the first doped silicon material layer through a plasma treatment. An insulating material layer is formed on the first doped silicon material layer after the surface flattening process is performed. A second doped silicon material layer is formed on the insulating material layer. The first doped silicon material layer is patterned into a first electrode. The insulating material layer is patterned into an insulating layer. The second doped silicon material layer is patterned into a second electrode. The method of manufacturing the capacitor structure may be used to produce a capacitor with better reliability and may improve capacitance density.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.