Semiconductor device and method
US12159925B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 20, 2022 |
| Grant date | Dec 3, 2024 |
| Priority date | — |
| Expiry date | Dec 22, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/306
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In an embodiment, a device includes: a substrate; a first semiconductor region extending from the substrate, the first semiconductor region including silicon; a second semiconductor region on the first semiconductor region, the second semiconductor region including silicon germanium, edge portions of the second semiconductor region having a first germanium concentration, a center portion of the second semiconductor region having a second germanium concentration less than the first germanium concentration; a gate stack on the second semiconductor region; and source and drain regions in the second semiconductor region, the source and drain regions being adjacent the gate stack.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.