Dual loop voltage regulator
US12164319B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 19, 2020 |
| Grant date | Dec 10, 2024 |
| Priority date | — |
| Expiry date | Dec 29, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/26
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A dual-loop low-drop (LDO) regulator having a first loop which is an analog loop that compares the voltage on the output supply node with a reference, and generates a bias or voltage control to control a strength of a final power switch. The first loop regulates the output voltage relative to a reference voltage by minimizing the error between the two voltages. A second loop (digital loop) that controls a current source which injects current on the gate of the final power switch to boost current for a load. The second loop is an auxiliary loop that boosts the current load for a set interval until the tracking bandwidth of the LDO resolves the error in the output, thereby reducing the peak-to-peak noise. The quiescent current is not increased a lot by the second loop since the second loop circuit is on for a fraction of the entire LDO operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.