Obfuscating encrypted register transfer logic model of a circuit
US12164608B2 · kind B2 · utility
0Cited by
7References
17Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 9, 2021 |
| Grant date | Dec 10, 2024 |
| Priority date | — |
| Expiry date | Feb 5, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F21/1064
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of obfuscating a circuit design includes, in part, receiving data representative of the circuit design. The method further includes, in part, simulating the circuit design, and obfuscating at least one output signal of the circuit design if a user performing the simulation is determined as not being an authorized user.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.