Circuitry for adjusting retention voltage of a static random access memory (SRAM)
US12165698B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 23, 2021 |
| Grant date | Dec 10, 2024 |
| Priority date | — |
| Expiry date | Feb 11, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/0409
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A static random access memory (SRAM) device disclosed herein includes an array of SRAM cells powered between first and second voltages. A reference voltage generator generates a reference voltage that is proportional to absolute temperature, with a magnitude curve of the reference voltage being based upon a control word. A low dropout amplifier sets and maintains the second voltage as being equal to the reference voltage. Control circuitry generates the control word based upon process variation information about the SRAM device. In one instance, the control circuitry monitors a canary bit-cell and increments the control word, to thereby increase the magnitude curve of the reference voltage, until the canary bit-cell fails. In another instance, the control circuitry measures the oscillation frequency of a ring oscillator, and selects the control word based upon the measured oscillation frequency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.