Contact structure for semiconductor device and method
US12166078B2 · kind B2 · utility
0Cited by
11References
20Claims
0Family size
Assignee
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Key dates
| Filing date | May 16, 2022 |
| Grant date | Dec 10, 2024 |
| Priority date | — |
| Expiry date | May 16, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76855
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A device includes a fin extending from a semiconductor substrate, a gate stack over and along a sidewall of the fin, an isolation region surrounding the gate stack, an epitaxial source/drain region in the fin and adjacent the gate stack, and a source/drain contact extending through the isolation region, including a first silicide region in the epitaxial source/drain region, the first silicide region including NiSi2, a second silicide region on the first silicide region, the second silicide region including TiSix, and a conductive material on the second silicide region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.