Three-dimensional (3D) semiconductor memory device
US12167601B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 23, 2023 |
| Grant date | Dec 10, 2024 |
| Priority date | — |
| Expiry date | Mar 23, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/50
Abstract
A three-dimensional semiconductor memory device includes a substrate including a first connection region and a second connection region in a first direction and a cell array region between the first and second connection regions, and a first block structure on the substrate. The first block structure has a first width on the cell array region, the first block structure has a second width on the first connection region, and the first block structure has a third width on the second connection region. The first, second and third widths are parallel to a second direction intersecting the first direction, and the first width is less than the second width and is greater than the third width.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.