Method and apparatus for correlating high-level code with low-level instructions for machine learning applications
US12174727B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 30, 2021 |
| Grant date | Dec 24, 2024 |
| Priority date | — |
| Expiry date | Oct 16, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N20/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A new approach is proposed to support correlating high-level code with low-level instructions of an application running on a hardware. A compiler that compiles a high-level function in the high-level code of the application into a set of low-level instructions to be executed on the hardware is configured to utilize one or more reserved fields of the set of low-level instructions to incorporate one or more IDs and an actionable item. The IDs are mapped to the high-level function, wherein such mapping is programmable by the compiler. Based on the mapped IDs and the actionable item incorporated in the set of the low-level instructions, the runtime performance of the application on the hardware can be monitored and profiled and issues related to the high-level code of the application can be identified for debugging purposes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.