Patent · US Active

Open cavity bridge co-planar placement architectures and processes

US12176268B2 · kind B2 · utility

0Cited by

3References

6Claims

0Family size

Assignee

Intel Corporation · US

Inventors

Omkar G. Karhade · Chandler, US
Digvijay A. Raorane · Chandler, US
Sairam Agraharam · Chandler, US
Nitin A. Deshpande · Chandler, US
Mitul Modi · Phoenix, US
Manish Dubey · Chandler, US
Edvin Cetegen · Chandler, US

Key dates

Filing date	Mar 24, 2020
Grant date	Dec 24, 2024
Priority date	—
Expiry date	Feb 23, 2043

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2225/06562
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

Embodiments disclosed herein include multi-die packages with open cavity bridges. In an example, an electronic apparatus includes a package substrate having alternating metallization layers and dielectric layers. The package substrate includes a first plurality of substrate pads and a second plurality of substrate pads. The package substrate also includes an open cavity between the first plurality of substrate pads and the second plurality of substrate pads, the open cavity having a bottom and sides. The electronic apparatus also includes a bridge die in the open cavity, the bridge die including a first plurality of bridge pads, a second plurality of bridge pads, and conductive traces. An adhesive layer couples the bridge die to the bottom of the open cavity. A gap is laterally between the bridge die and the sides of the open cavity, the gap surrounding the bridge die.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.