Package substrate and semiconductor package including the same
US12176308B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 1, 2023 |
| Grant date | Dec 24, 2024 |
| Priority date | — |
| Expiry date | Sep 1, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3512
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A package substrate may include an insulation substrate, at least one redistribution layer (RDL) and a redistribution pad. The RDL may be included in the insulation substrate. The redistribution pad may extend from the RDL. The redistribution pad may include at least one segmenting groove in a radial direction of the redistribution pad. Thus, the at least one segmenting groove in the radial direction of the redistribution pad may reduce an area of the redistribution pad. Therefore, application of physical stress to a PID disposed over the redistribution pad may be suppressed, and thus generation of cracks in the PID may be reduced. Further, spreading of the cracks toward the redistribution pad from the PID may also be suppressed, and thus reliability the semiconductor package may be improved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.