Pressure regulated semiconductor wafer cooling apparatus and method and a pressure regulating apparatus
US12181191B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 10, 2021 |
| Grant date | Dec 31, 2024 |
| Priority date | — |
| Expiry date | Nov 4, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/68714
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor wafer cooling system and method and a pressure regulating apparatus for mitigating pressure increases in a semiconductor wafer conditioning circuit are disclosed. The pressure regulating apparatus comprises: a buffer vessel, the buffer vessel comprising an inlet and outlet channel; wherein the inlet channel is configured in operation to be in fluid communication with a higher pressure location of the semiconductor wafer conditioning circuit, and the outlet channel is configured in operation to be in fluid communication with a lower pressure location. the inlet channel comprises a pressure controlled valve configured to close the inlet channel during normal operation such that the buffer vessel is isolated from the higher pressure location of the conditioning circuit and to open the inlet channel in response to the pressure within the semiconductor conditioning circuit rising above a predetermined level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.