Silicon-oxide-nitride-oxide-silicon based multi-level non-volatile memory device and methods of operation thereof
US12183395B2 · kind B2 · utility
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Key dates
| Filing date | May 23, 2022 |
| Grant date | Dec 31, 2024 |
| Priority date | — |
| Expiry date | May 23, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5621
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of operating a semiconductor inference device that includes the steps of writing one of multiple analog weight values to memory cells of a non-volatile memory (NVM) array, receiving inputs through a bus system, performing multiply accumulate (MAC) operations based on the inputs and the stored analog weight values, converting results of the MAC operations to outputs, and transmitting the outputs through the bus system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.