Variable resistance memory device
US12185647B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 10, 2023 |
| Grant date | Dec 31, 2024 |
| Priority date | — |
| Expiry date | Aug 3, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/021
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A variable resistance memory device includes a first conductive line extending on a substrate in a first horizontal direction; a second conductive line extending on the first conductive line in a second horizontal direction perpendicular to the first horizontal direction; and a memory cell at an intersection between the first conductive line and the second conductive line, the memory cell including a selection element and a variable resistor, wherein the variable resistor includes a first variable resistance layer having a senary component represented by CaGebSbcTedAeXf, in which A and X are each a group 13 element different from each other, and 1≤a≤18, 13≤b≤26, 15≤c≤30, 35≤d≤55, 0.1≤e≤8, 0.1≤f≤8, and a+b+c+d+e+f=100.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.