Contact openings in semiconductor devices
US12191202B2 · kind B2 · utility
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1References
20Claims
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Assignee
Inventors
Key dates
| Filing date | May 14, 2021 |
| Grant date | Jan 7, 2025 |
| Priority date | — |
| Expiry date | Jan 27, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2221/1063
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In certain embodiments, a method for processing a semiconductor substrate includes receiving a semiconductor substrate that includes a nitride etch stop layer aligned to a gate electrode and a metal-based etch stop layer aligned to a source/drain contact region. The method further includes selectively etching the metal-based etch stop layer, to remove the metal-based etch stop layer and expose a surface of the source/drain contact region, by exposing the semiconductor substrate to a plasma formed in a gas comprising a corrosive material and fluorocarbon.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.