Heterogeneous integration of radio frequency transistor chiplets having interconnections to host wafer circuits for optimizing operating conditions
US12191295B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 25, 2024 |
| Grant date | Jan 7, 2025 |
| Priority date | — |
| Expiry date | Jun 25, 2044 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/401
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An electronic assembly heterogeneously integrates radio-frequency (RF) transistor chiplets into a host wafer, and the chiplets have interconnections to host wafer circuits. The assembly has at least one RF transistor chiplet having a chiplet circuit including a high-electron-mobility transistor (HEMT) or a heterojunction bipolar transistor (HBT). The host wafer has at least one host wafer circuit for the purpose of producing bias conditions that optimize performance of the HEMT or HBT. The host wafer circuit includes first circuitry to provide a DC bias of the HEMT or HBT; or second circuitry configured to sense radio-frequency operating conditions of the HEMT or HBT. The electrical interconnects are between the chiplet and the wafer, and electrically connect the host wafer circuit to the chiplet circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.