Semiconductor structure and method for manufacturing semiconductor structure
US12193218B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 8, 2022 |
| Grant date | Jan 7, 2025 |
| Priority date | — |
| Expiry date | Apr 20, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6728
Abstract
A semiconductor structure and a method for manufacturing the semiconductor structure are provided. The semiconductor structure includes a semiconductor base, a bit line and a word line. The semiconductor base includes a substrate and an isolation structure. The isolation structure is arranged above the substrate and configured to isolate a plurality of active regions from each other. The bit line is arranged in the substrate and connected to the plurality of active regions. The word line is arranged in the isolation structure, intersects with the plurality of active regions and surrounds the plurality of active regions. The substrate is a Silicon-On-Insulator (SOI) substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.