Patent · US Active

Semiconductor device fabrication

US12193229B2 · kind B2 · utility

0Cited by
1References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 26, 2021
Grant dateJan 7, 2025
Priority date
Expiry dateAug 31, 2043

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10B43/50
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

Aspects of the disclosure provide methods for fabricating semiconductor devices. In some examples, a method for fabricating a semiconductor device includes forming a stack of layers having a first region and a second region. The stack of layers includes at least a first layer. The method then forms a hard mask layer on the stack of layers in the first region. Then, the method includes patterning the stack of layers in the second region of the semiconductor device. The patterning of the stack of layers in the second region removes a portion of the stack of layers in the second region, and exposes a side of the stack of layers. The method further includes covering at least the side of the stack of layers with a second layer that has a lower remove rate than the first layer, and then the method includes removing the hard mask layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.