Modified stacks for 3D NAND
US12195846B2 · kind B2 · utility
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3References
12Claims
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Key dates
| Filing date | Aug 6, 2020 |
| Grant date | Jan 14, 2025 |
| Priority date | — |
| Expiry date | Mar 4, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/27
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Exemplary methods of forming semiconductor structures may include forming a silicon oxide layer from a silicon-containing precursor and an oxygen-containing precursor. The methods may include forming a silicon nitride layer from a silicon-containing precursor, a nitrogen-containing precursor, and an oxygen-containing precursor. The silicon nitride layer may be characterized by an oxygen concentration greater than or about 5 at. %. The methods may also include repeating the forming a silicon oxide layer and the forming a silicon nitride layer to produce a stack of alternating layers of silicon oxide and silicon nitride.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.