Silicon photonic integrated circuits on substrates with structured insulators having specific thicknesses in separate zones

US12197004B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Harel Frish · Kiryat Gat, IL
• John Heck · Berkeley, US
• Randal Appleton · Albuquerque, US
• Stefan Meister · Berlin, DE
• Haisheng Rong · Pleasanton, US
• Joshua Keener · Albuquerque, US
• Michael Favaro · Edgewood, US
• Wesley Harrison · Portland, US
• Hari Mahalingam · San Jose, US
• Sergei Sochava · Sunnyvale, US

Key dates

• Filing date: Jun 25, 2021
• Grant date: Jan 14, 2025
• Expiry date: Mar 2, 2043

Classification

• Technology area (CPC G): Physics
• CPC primary: G02B2006/12164
• WIPO field: Optics
• WIPO sector: Instruments

Abstract

Silicon photonic integrated circuit (PIC) on a multi-zone semiconductor on insulator (SOI) substrate having at least a first zone and a second zone. Various optical devices of the PIC may be located above certain substrate zones that are most suitable. A first length of a photonic waveguide structure comprises the crystalline silicon and is within the first zone, while a second length of the waveguide structure is within the second zone. Within a first zone, the crystalline silicon layer is spaced apart from an underlying substrate material by a first thickness of dielectric material. Within the second zone, the crystalline silicon layer is spaced apart from the underlying substrate material by a second thickness of the dielectric material.