Machine learning on overlay management
US12197138B2 · kind B2 · utility
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6References
20Claims
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Key dates
| Filing date | Feb 25, 2021 |
| Grant date | Jan 14, 2025 |
| Priority date | — |
| Expiry date | Nov 18, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06V10/764
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The current disclosure describes techniques for managing vertical alignment or overlay in semiconductor manufacturing using machine learning. Alignments of interconnection features in a fan-out WLP process are evaluated and managed through the disclosed techniques. Big data and machine learning are used to train a classification that correlates the overlay error source factors with overlay metrology categories. The overlay error source factors include tool signals. The trained classification includes a base classification and a Meta classification.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.