Patent · US Active

Efficient utilization of processing element array

US12198041B2 · kind B2 · utility

0Cited by
13References
20Claims
0Family size

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Key dates

Filing dateJul 14, 2023
Grant dateJan 14, 2025
Priority date
Expiry dateJul 14, 2043

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06N3/08
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Generating instructions for programming a processing element array to implement a convolution operation can include determining that the convolution operation under-utilizes the processing element array. The convolution operation involves using the processing element array to perform a series of matrix multiplications between a set of filters and a set of input matrices. Each filter comprises a weight matrix. Each input matrix is assigned to a respective row in the processing element array. Under-utilization can be determined through detecting that less than a threshold number of rows would be used concurrently. In response to determining that the convolution operation under-utilizes the processing element array, instructions can be added for modifying the convolution operation to increase the number of rows used concurrently. The added instructions are executable to cause at least one input matrix to be processed in parallel across more rows compared to processing without modifying the convolution operation.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.