ML-enabled assured microelectronics manufacturing: a technique to mitigate hardware trojan detection
US12198325B2 · kind B2 · utility
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16Claims
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Key dates
| Filing date | Apr 29, 2021 |
| Grant date | Jan 14, 2025 |
| Priority date | — |
| Expiry date | Jan 27, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T2207/30148
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for assuring that integrated circuits are free of malicious circuit insertions and/or IC design modifications through mask swapping/addition is provided. The method includes a step of comparing 3D tomographic images constructed from design GDS to the 3D tomographic images constructed from in-line fab metrology data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.