Methods of operating ferroelectric (Fe) FET based non-volatile memory circuits and related control circuits
US12200942B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 8, 2022 |
| Grant date | Jan 14, 2025 |
| Priority date | — |
| Expiry date | Jul 9, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B51/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of writing data to a Ferroelectric-FET (FeFET) based non-volatile memory device can be provided by applying a voltage pulse at a write voltage level with a write polarity at a gate electrode of a FeFET device with reference to a source electrode of the FeFET device, as a write operation to the FeFET device to establish a state for the FeFET device, changing the voltage pulse, directly after the write operation, to a non-zero bias voltage level with a bias polarity that is opposite to the write polarity, at the gate electrode with reference to the source electrode for a delay time to reduce neutralization of a trap state associated with the write operation of the FeFET device, and changing the voltage pulse, after the delay time, to a read voltage level as a read operation to the FeFET device to determine the state of the FeFET device established during the write operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.