System and method for parallel testing of electronic device
US12203982B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 16, 2022 |
| Grant date | Jan 21, 2025 |
| Priority date | — |
| Expiry date | Apr 14, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2874
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Circuits and methods for testing voltage monitor circuits are provided. In one embodiment, a method includes setting voltage monitor circuits to test mode; setting, a monitor reference in each voltage monitor circuit, to a respective targeted threshold voltage using a corresponding trim code; ramping, a voltage provided to a subset of voltage monitor circuits, from a first voltage to a second voltage using a test voltage supply, voltages between the first voltage and the second voltage corresponding with targeted threshold voltages of the subset of voltage monitor circuits; determining, for each voltage monitor circuit in the subset of voltage monitor circuits, a voltage value of the test voltage supply resulting in a change in a logic state at an output of a corresponding voltage monitor circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.