Flushing cache lines involving persistent memory
US12204441B2 · kind B2 · utility
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18Claims
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Key dates
| Filing date | Dec 24, 2020 |
| Grant date | Jan 21, 2025 |
| Priority date | — |
| Expiry date | May 21, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/466
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method includes receiving, via a communication link and at a device of an integrated circuit system, a cache line comprising a destination address, determining, via the device, a type of memory or storage associated with the destination address, the type of memory or storage comprising persistent or non-persistent, and tagging the cache line with metadata in a manner indicating the type of memory or storage associated with the destination address.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.