Sharath Raghava
14Patents
3h-index
18Co-inventors
57Inventor score
Filing activity: May 30, 2003 → Jun 7, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US10649927B2 | Dual in-line memory module (DIMM) programmable accelerator card | Emerging Cross-Sectional Technologies | 13 | Active |
| US9607714B2 | Hardware command training for memory using write leveling mechanism | Physics | 11 | Active |
| US9368169B2 | Hardware chip select training for memory using write leveling mechanism | Physics | 3 | Active |
| US9824772B2 | Hardware chip select training for memory using read commands | Physics | 3 | Active |
| US7143304B2 | Method and apparatus for enhancing the speed of a synchronous bus | Physics | 0 | Expired |
| US11700002B2 | Network-on-chip (NOC) with flexible data width | Emerging Cross-Sectional Technologies | 0 | Active |
| US9378169B2 | Method and system for changing bus direction in memory systems | Emerging Cross-Sectional Technologies | 0 | Active |
| US11789883B2 | Inter-die communication of programmable logic devices | Physics | 0 | Active |
| US11206024B2 | Network-on-chip (NOC) with flexible data width | General | 0 | Revoked |
| US12204441B2 | Flushing cache lines involving persistent memory | Physics | 0 | Active |
| US10790827B2 | Network-on-chip (NOC) with flexible data width | Emerging Cross-Sectional Technologies | 0 | Active |
| US12417319B2 | Multi-chip secure and programmable systems and methods | Physics | 0 | Active |
| US12237831B2 | Network-on-chip (NOC) with flexible data width | Emerging Cross-Sectional Technologies | 0 | Active |
| US11342918B2 | Network-on-chip (NOC) with flexible data width | Emerging Cross-Sectional Technologies | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.