Patent · US Active

Non-volatile memory device with reference voltage circuit including column(s) of reference bit cells adjacent columns of memory bit cells within a memory cell array

US12205633B2 · kind B2 · utility

0Cited by

8References

6Claims

0Family size

Assignee

GLOBALFOUNDRIES U.S. Inc. · US

Inventors

Venkatesh P. Gopinath · Planada, US
Xiaoli Hu · Shanghai, CN
Thomas Melde · Dresden, DE
Nicki N. Mika · Dresden, DE

Key dates

Filing date	Jun 14, 2022
Grant date	Jan 21, 2025
Priority date	—
Expiry date	Nov 11, 2042

Classification

Technology area (CPC G)Physics
CPC primaryG11C16/3427
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Structures herein include an array of non-volatile memory cells. The non-volatile memory cells include memory bit cells and at least one reference bit cell that is adjacent the memory bit cells. These structures also include at least one reference voltage regulator connected to the reference bit cell, and at least one sense amplifier connected to the memory bit cells and the reference voltage regulator.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.