Semiconductor device structure with source/drain structure and method for forming the same
US12205849B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 25, 2022 |
| Grant date | Jan 21, 2025 |
| Priority date | — |
| Expiry date | Jul 19, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/822
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A method for forming a semiconductor device structure is provided. The method includes providing a substrate having a base, a first fin, and a second fin over the base. The method includes forming a gate stack over the first fin and the second fin. The method includes forming a first spacer over gate sidewalls of the gate stack and a second spacer adjacent to the second fin. The method includes partially removing the first fin and the second fin. The method includes forming a first source/drain structure and a second source/drain structure in the first trench and the second trench respectively. A first ratio of a first height of the first merged portion to a second height of a first top surface of the first source/drain structure is greater than or equal to about 0.5.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.