Semiconductor package
US12205939B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 14, 2021 |
| Grant date | Jan 21, 2025 |
| Priority date | — |
| Expiry date | Jul 16, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package may include a first redistribution layer, a passive device disposed on a top surface of the first redistribution layer, a bridge structure disposed on the top surface of the first redistribution layer and laterally spaced apart from the passive device, a second redistribution layer disposed on and electrically connected to the passive device and the bridge structure, conductive structures disposed between the first redistribution layer and the second redistribution layer and laterally spaced apart from the passive device and the bridge structure, a first semiconductor chip mounted on a top surface of the second redistribution layer, and a second semiconductor chip mounted on the top surface of the second redistribution layer. The conductive structures may include a signal structure and a ground/power structure, which is laterally spaced apart from the signal structure and has a width larger than the signal structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.