Trigger signaling through a clock signal in cascading radar systems

US12212649B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• George Efthivoulidis · Graz, AT
• Tony Gschier · Graz, AT
• Bernd Zimek · Graz, AT
• Peter Thurner · Weißensee, AT
• Thomas Santa · Seeboden, AT

Key dates

• Filing date: Mar 23, 2023
• Grant date: Jan 28, 2025
• Expiry date: Jul 26, 2043

Classification

• Technology area (CPC H): Electricity
• CPC primary: H04L7/0331
• WIPO field: Digital communication
• WIPO sector: Electrical engineering

Abstract

A radar monolithic microwave integrated circuit (MMIC) includes a trigger encoder configured to receive a clock signal comprising a plurality of clock pulses having a fixed amplitude and a trigger signal configured to indicate trigger events. The trigger encoder is configured to encode the trigger signal into the clock signal to generate a distributed clock signal by skipping at least one clock pulse of the plurality of clock pulses to indicate a trigger event. The radar MMIC is configured to output the distributed clock signal having the at least one clock pulse skipped to indicate the trigger event. The radar MMIC is configured to receive the distributed clock signal as a received distributed clock signal. The radar MMIC further includes a radar operation controller configured to detect the trigger event based on the received distributed clock signal and initiate a radar operation based on detecting the trigger event.