Integrated circuit (IC) packages employing a capacitor-embedded, redistribution layer (RDL) substrate for interfacing an IC chip(s) to a package substrate, and related methods

US12218041B2 · kind B2 · utility

Assignee

• QUALCOMM Incorporated · US

Inventors

• Jihong Choi · San Diego, US
• Giridhar Nallapati · San Diego, US
• William Stone · San Diego, US
• Jianwen Xu · Chandler, US
• Jonghae Kim · San Diego, US
• Periannan Chidambaram · San Diego, US
• Ahmer Syed · Chandler, US

Key dates

• Filing date: Apr 22, 2021
• Grant date: Feb 4, 2025
• Expiry date: Jan 6, 2042

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L23/49816
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Integrated circuit (IC) packages employing a capacitor-embedded, redistribution layer (RDL) substrate and related fabrication methods. The embedded capacitor can be coupled to a power distribution network (PDN) to provide decoupling capacitance to reduce current-resistance (IR) drop. The RDL substrate is disposed between the IC chip(s) and the package substrate to minimize distance between the embedded capacitor(s) and the IC chip(s) to reduce the parasitic inductance in the PDN, thus reducing PDN noise. With the RDL substrate disposed between the package substrate and the IC chip(s), the RDL substrate needs to support through-interconnections between the package substrate and the IC chip(s). In this regard, the RDL substrate includes an outer RDL layer adjacent to the IC chip(s) to support small pitch metal interconnects as well as provide fan-out capability. This provides enhanced connectivity compatibility with higher-density die interconnect IC chips while also supporting a closer located embedded capacitor in the PDN.