Semiconductor device and fabrication method thereof
US12224335B2 · kind B2 · utility
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1References
14Claims
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Assignee
Inventor
Key dates
| Filing date | Jul 18, 2022 |
| Grant date | Feb 11, 2025 |
| Priority date | — |
| Expiry date | Mar 23, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/26513
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a substrate of first conductivity type; a first heavily doped region and a second heavily doped region of second conductivity type spaced apart from the first heavily doped region, located in the substrate; a channel region in the substrate and between the first heavily doped region and the second heavily doped region; a gate disposed on the channel region; a hard mask layer covering a top surface and a sidewall of the gate; and a spacer disposed on a sidewall of the hard mask layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.