Semiconductor device related to calibrating termination resistance
US12224747B2 · kind B2 · utility
1Cited by
2References
26Claims
0Family size
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Key dates
| Filing date | Jun 28, 2023 |
| Grant date | Feb 11, 2025 |
| Priority date | — |
| Expiry date | Oct 12, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/2254
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor system includes a controller configured to apply a command address, a first chip selection signal, and a second chip selection signal, and a semiconductor device including a first rank and a second rank configured to calibrate each termination resistance, based on the command address, the first chip selection signal, and the second chip selection signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.