Additive manufacturing process of 3D electronic substrate
US12226822B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 11, 2023 |
| Grant date | Feb 18, 2025 |
| Priority date | — |
| Expiry date | Aug 11, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K3/1241
- WIPO fieldMaterials, metallurgy
- WIPO sectorChemistry
Abstract
A method of forming electronic substrates and assemblies is provided. The method includes forming a first layer, including co-depositing a first material and a second material, where the first material and the second material are co-deposited as powders, binders, slurries, inks, or combinations thereof, and at least partially sintering or curing the first layer of co-deposited materials. Further, the method includes forming a second layer, including co-depositing the first material and the second material, and at least partially sintering or curing the second layer of co-deposited materials. Additionally, the method includes retrieving a solid electronic substrate wherein the sintered or cured first material of the first layer forms the solid electronic substrate and the sintered or cured second material of the first layer forms a feature in or on the solid electronic substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.