Planar SiC MOSFET with retrograde implanted channel
US12230675B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 31, 2020 |
| Grant date | Feb 18, 2025 |
| Priority date | — |
| Expiry date | May 18, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8325
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A silicon carbide (SiC) planar transistor device includes a SiC semiconductor substrate of a first charge type, a SiC epitaxial layer of the first charge type formed at a top surface of the SiC semiconductor substrate, a source structure of the first charge type formed at a top surface of the SiC epitaxial layer, a drain structure of the first charge type formed at a bottom surface of the SiC semiconductor substrate, a gate structure comprising a gate runner and a gate dielectric that covers at least part of the source structure and the gate runner, and a channel region of a second charge type located in vertical direction below the gate structure and adjacent to the source structure. The channel can be formed by performing a plurality of implantation steps so that the channel region comprises a first region and a second region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.