Approach for performing efficient memory operations using near-memory compute elements
US12235756B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 21, 2021 |
| Grant date | Feb 25, 2025 |
| Priority date | — |
| Expiry date | Apr 13, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/06
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Near-memory compute elements perform memory operations and temporarily store at least a portion of address information for the memory operations in local storage. A broadcast memory command is then issued to the near-memory compute elements that causes the near-memory compute elements to perform a subsequent memory operation using their respective address information stored in the local storage. This allows a single broadcast memory command to be used to perform memory operations across multiple memory elements, such as DRAM banks, using bank-specific address information. In one implementation, the approach is used to process workloads with irregular updates to memory while consuming less command bus bandwidth than conventional approaches. Implementations include using conditional flags to selectively designate address information in local storage that is to be processed with the broadcast memory command.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.