Method for forming a buried metal line in a semiconductor substrate
US12237207B2 · kind B2 · utility
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5References
8Claims
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Key dates
| Filing date | Sep 18, 2023 |
| Grant date | Feb 25, 2025 |
| Priority date | — |
| Expiry date | Sep 18, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming a buried metal line in a semiconductor substrate comprises forming, at a position between a pair of semiconductor structures, a metal line trench in the semiconductor substrate at a level below a base of each semiconductor structure of the pair, and forming the metal line in the metal line trench by means of area selective deposition of a metal line material, followed by embedding the pair of semiconductor structures in an insulating layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.