Inventor · Heverlee, BE

Basoene Briggs

7Patents
0h-index
15Co-inventors
34Inventor score

Filing activity: Feb 27, 2018 → Sep 18, 2023

Most-cited inventions

PatentTitleAreaCited byStatus
US11088070B2 Method of forming a multi-level interconnect structure in a semiconductor device Electricity 0 Active
US11682591B2 Method for forming transistor structures Electricity 0 Active
US12237207B2 Method for forming a buried metal line in a semiconductor substrate Electricity 0 Active
US10763159B2 Method for forming a multi-level interconnect structure Electricity 0 Active
US12432985B2 Strained semiconductor monocrystalline nanostructure Electricity 0 Active
US10395978B2 Method of patterning target layer Electricity 0 Active
US10672655B2 Method of patterning target layer Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.