Source/drain epitaxial layers for transistors

US12243931B2 · kind B2 · utility

Assignee

• TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD. · TW

Inventors

• Wei-Min Liu · Dublin, US
• Yee-Chia Yeo · Baoshan, TW
• Li-Li Su · Zhubeikou, TW

Key dates

• Filing date: May 2, 2023
• Grant date: Mar 4, 2025
• Expiry date: May 2, 2043

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/038
• WIPO field: Micro-structural and nano-technology
• WIPO sector: Chemistry

Abstract

The present disclosure is directed to methods for forming source/drain (S/D) epitaxial structures with a hexagonal shape. The method includes forming a fin structure that includes a first portion and a second portion proximate to the first portion, forming a gate structure on the first portion of the fin structure, and recessing the second portion of the fin structure. The method further includes growing a S/D epitaxial structure on the recessed second portion of the fin structure, where growing the S/D epitaxial structure includes exposing the recessed second portion of the fin structure to a precursor and one or more reactant gases to form a portion of the S/D epitaxial structure. Growing the S/D epitaxial structure further includes exposing the portion of the S/D structure to an etching chemistry and exposing the portion of the S/D epitaxial structure to a hydrogen treatment to enhance growth of the S/D epitaxial structure.