Accelerating processor based artificial neural network computation
US12248782B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 25, 2020 |
| Grant date | Mar 11, 2025 |
| Priority date | — |
| Expiry date | Feb 25, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N3/02
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus employed in a processing device comprises a processor configured to process data of a predefined data structure. A memory fetch device is coupled to the processor and is configured to determine addresses of the packed data for the processor. The packed data is stored on a memory device that is coupled to the processor. The memory fetch device is further configured to provide output data based on the addresses of the packed data to the processor, where the output data is configured according to the predefine data structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.