Carbon based depositions used for critical dimension control during high aspect ratio feature etches and for forming protective layers
US12249514B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 16, 2020 |
| Grant date | Mar 11, 2025 |
| Priority date | — |
| Expiry date | Aug 6, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02274
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
Fabricating a semiconductor substrate by (a) vertical etching a feature having sidewalls and a depth into one or more layers formed on the semiconductor substrate and (b) depositing an amorphous carbon liner onto the sidewalls of the feature. Steps (a) and optionally (b) are iterated until the vertical etch feature has reached a desired depth. With each iteration of (a), the feature is vertical etched deeper into the one or more layers, while the amorphous carbon liner resists lateral etching of the sidewalls of the feature. With each optional iteration of (b), the deposited amorphous carbon liner on the sidewalls of the feature is replenished.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.