Method for manufacturing semiconductor device structure
US12250833B2 · kind B2 · utility
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3References
20Claims
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Assignee
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Key dates
| Filing date | Dec 27, 2021 |
| Grant date | Mar 11, 2025 |
| Priority date | — |
| Expiry date | Jan 26, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/62
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for manufacturing semiconductor device structure includes providing a substrate having a surface; forming a first gate structure on the surface; forming a second gate structure on the surface; forming a first well region in the substrate and between the first gate structure and the second gate structure; forming a conductive contact within a trench between the first gate structure and the second gate structure; forming a first structure in the first well region, wherein the first structure tapers away from a bottom portion of the conductive contact.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.