System and method for defragmentation of memory device
US12253942B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 2, 2022 |
| Grant date | Mar 18, 2025 |
| Priority date | — |
| Expiry date | Jun 4, 2042 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In certain aspects, the memory controller includes a controller memory for storing a logical-to-physical (L2P) address mapping table corresponding to a file, and a controller processor configured to control a memory device, receive a mapping update command, and update the L2P address mapping table according to the mapping update command by replacing original logical addresses of logical block address (LBA) segments of the file with new continuous logical addresses of a merged LBA segment of the file, and changing an original mapping relation between the original logical addresses of the LBA segment of the file and physical addresses of the file, to a new mapping relation between the new continuous logical addresses of the merged LBA segment of the file and the physical addresses of the file.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.