Patent · US Active

Semiconductor devices and methods of manufacturing

US12255070B2 · kind B2 · utility

0Cited by
10References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 30, 2021
Grant dateMar 18, 2025
Priority date
Expiry dateAug 4, 2043

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D64/251
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

In a semiconductor structure, a first conductive feature is formed in a trench by PVD and a glue layer is then deposited on the first conductive feature in the trench before CVD deposition of a second conductive feature there-over. The first conductive feature acts as a protection layer to keep silicide from being damaged by later deposition of metal or a precursor by CVD. The glue layer extends along the extent of the sidewall to enhance the adhesion of the second conductive features to the surrounding dielectric layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.