Patent · US Active

Overlay mark, overlay marking method and overlay measuring method

US12259661B2 · kind B2 · utility

0Cited by

1References

7Claims

0Family size

Assignee

NEXCHIP SEMICONDUCTOR CORPORATION · CN

Inventors

Kuotung Yang · Daguantang, CN
Hui Liu · Clyde Hill, US
Ke Yuan · Shanghai, CN

Key dates

Filing date	Jul 15, 2021
Grant date	Mar 25, 2025
Priority date	—
Expiry date	Jan 24, 2044

Classification

Technology area (CPC H)Electricity
CPC primaryH01L22/30
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

The present disclosure discloses an overlay mark, an overlay marking method and an overlay measuring method. The overlay marking method includes at least: preparing a first material layer; preparing a first mark group on the first material layer, and the first mark group is a centrally symmetrical pattern; preparing a second material layer on the first material layer; preparing a second mark group corresponding to the first mark group on the second material layer, and the second mark group is a centrally symmetrical pattern; centers of symmetry of the second mark group and the first mark group are located on the same vertical line; preparing a third material layer on the second material layer; preparing a third mark group corresponding to the first mark group and the second mark group on the third material layer, and the third mark group is a centrally symmetrical pattern.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.