Using renamed registers to support multiple vset{i}vl{i} instructions
US12260217B2 · kind B2 · utility
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16Claims
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Key dates
| Filing date | Mar 1, 2023 |
| Grant date | Mar 25, 2025 |
| Priority date | — |
| Expiry date | Mar 1, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3856
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for renaming architectural register, such as control and status register (CSR), is disclosed. The method includes decoding an instruction for updating CSR, updating the CSR based on a respective instruction of the one or more instructions, allocating a unique tag to the instruction in pipeline, and writing the tag into a mapping table for renaming the CSR. The tag can identify the CSR included in the instruction or the updated values of the CSR. The tag can be associated with a unique value. Moreover, the method can employ a First In, First Out (FIFO) queuing technique and virtual bits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.