Semiconductor device including internal transmission path and stacked semiconductor device using the same
US12260929B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 27, 2024 |
| Grant date | Mar 25, 2025 |
| Priority date | — |
| Expiry date | Feb 27, 2044 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/1096
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor device comprising: a first or a second path configured to transmit a first signal which swings between a ground level and a first level, a third path configured to transmit a second signal which swings between the ground level and a second level lower than the first level, a transmitter configured to output received the first signal through the first or second path as the second signal to the third path, and initialize in response to an enable signal, and a receiver configured to output received the second signal through the third path as the first signal through the first or second path, determine level of the second signal through a reference level that is regulated according to a fed-back level of an output terminal thereof, and initialize in response to the enable signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.