Magnetoresistive random access memory and method for fabricating the same
US12262646B2 · kind B2 · utility
0Cited by
0References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 25, 2023 |
| Grant date | Mar 25, 2025 |
| Priority date | — |
| Expiry date | Dec 25, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N50/10
Abstract
A method for fabricating a semiconductor device includes the steps of first forming a first inter-metal dielectric (IMD) layer on a substrate and a metal interconnection in the first IMD layer, forming a magnetic tunneling junction (MTJ) and a top electrode on the metal interconnection, forming a spacer adjacent to the MTJ and the top electrode, forming a second IMD layer around the spacer, forming a cap layer on the top electrode, the spacer, and the second IMD layer, and then patterning the cap layer to form a protective cap on the top electrode and the spacer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.